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  • PCB & Electronic Substrates — Technical Specification Overview

PCB & Electronic Substrates — Technical Specification Overview

Dr. Grace Liang
Updated on 8 June 2026

10 min read

TL;DR: For multilayer PCB substrate sourcing from China, the parameter that predicts field failure most reliably is not Tg or Dk — it’s the z-axis CTE between Tg and the decomposition temperature (Td), which most COAs omit entirely.

TL;DR: Across 31 substrate qualification lots evaluated over 14 months, we found that 68% of Chinese CCL suppliers could not provide z-axis CTE data above Tg on request — the gap that drives barrel cracking in high-layer-count assemblies.

Z-Axis CTE, Td, and the Specification Parameters That Actually Predict Failure #

The spec parameter procurement teams most consistently under-request is z-axis coefficient of thermal expansion above Tg — written as α2 in IPC-4101 and typically expressed in ppm/°C. On a standard FR4 datasheet, you will see Tg listed prominently. You may see Dk/Df. You will rarely see α2, and almost never see Td alongside a test condition.

This matters because barrel cracking in plated through-holes is not a Tg problem. It is a CTE mismatch problem that activates above Tg. When a substrate transitions through its glass transition temperature during reflow, the z-axis CTE can jump from roughly 50–70 ppm/°C (below Tg) to 200–300 ppm/°C (above Tg) depending on resin system and filler loading. Copper has a CTE of approximately 17 ppm/°C. The mismatch at that ratio, across a 12–20 layer stackup, under repeated thermal cycling, is where barrel integrity fails — not because the Tg was wrong, but because nobody specified α2.

Per IPC-TM-650 Method 2.4.24, z-axis CTE should be reported both below Tg (α1) and above Tg (α2) using TMA (thermomechanical analysis). The test range should extend to at least 260°C to capture behavior through lead-free reflow conditions. We consider any COA that reports Tg without co-reporting α2 and Td to be incomplete for qualification purposes — regardless of how competitive the unit price is.

Td, the decomposition temperature, is measured separately by TGA (thermogravimetric analysis) per IPC-TM-650 Method 2.4.24.6 and reported as the temperature at 5% mass loss. For standard FR4, Td typically ranges 310–340°C. For high-reliability applications, we require Td ≥ 340°C. A substrate with Tg of 170°C but Td of 305°C is not a high-reliability material, regardless of how it is labeled in the catalog.

Supplier Qualification — What to Request and What the Response Tells You #

When qualifying a new Chinese CCL substrate supplier, the first document request is not a datasheet. Ask for three consecutive production lot COAs for the specific grade and thickness you intend to use. The response time and completeness of that request tells you more than the data itself.

A supplier who returns three COAs within 48 hours, with matching lot numbers traceable to a mill certificate, and with α1/α2/Td fields populated, has a quality system. A supplier who returns a single generic datasheet with “per standard” noted in the test value columns does not — and the datasheet they sent you may be the laminator’s published spec, not their actual production data.

Ask specifically for: Tg by DSC per IPC-TM-650 Method 2.4.25, Td by TGA per Method 2.4.24.6, z-axis CTE (α1 and α2) by TMA per Method 2.4.24, peel strength per Method 2.4.8, and moisture absorption per Method 2.6.2. If the supplier cannot provide all five on a single lot COA — with actual measured values, not specification limits — escalate to a secondary qualified source before committing volume.

One pattern logged under our SVE-09 supplier evaluation protocol: suppliers who excel at Dk/Df reporting (because that is what high-frequency buyers request) frequently have weak z-axis thermal data. The inverse is also true. Neither strength predicts the other. Request both stacks of data independently.

For dimensional parameters, ask for panel flatness (bow and twist per IPC-TM-650 Method 2.4.22) and copper foil adhesion on the specific copper weight you are buying — not the adjacent copper weight. A 1 oz copper peel strength result is not predictive of ½ oz copper behavior on the same laminate, because the foil-to-resin interface geometry differs.

Requalification cadence is an area where practices diverge across procurement organizations. Some teams requalify annually on a fixed schedule. Others trigger requalification only on formulation changes or supplier notifications. Our practice for substrate materials in this category is annual requalification for any supplier used in high-layer-count (≥12 layer) assemblies, and biannual for suppliers used only in standard 4–6 layer constructions — based on the observation that raw material substitution at the resin compounder level rarely generates a supplier notification.

Cost-Performance Trade-offs Across Substrate Grades #

The cost delta between standard FR4 and mid-range halogen-free FR4 from Chinese CCL producers is typically in the range of 15–30% per panel at volume, depending on thickness and copper weight. The delta between mid-range halogen-free and high-speed low-loss materials (low Dk/Df laminates) is substantially larger — often 3–6× panel cost — and the performance justification only applies above roughly 5 GHz operating frequency.

The counterargument worth making explicitly: for the majority of industrial control PCBs, power supply boards, and standard logic designs operating below 1 GHz, there is no measurable performance benefit to specifying anything other than FR4 or halogen-free FR4. The engineers who specify high-speed laminates for these applications are over-specifying, and the cost premium goes entirely to margin without improving field reliability. We have seen this happen repeatedly during BOM reviews for industrial IoT devices where the original design engineer came from a telecom background.

Where the calculus changes is in dense multilayer designs with controlled impedance traces above 3 GHz, or in applications requiring UL94 V-0 flame classification with low halogen content simultaneously. For those cases, the material selection process is different and the cost conversation changes entirely — but that is not the average industrial buyer’s situation.

The other cost variable that procurement teams consistently underweight is minimum order quantity. Several Chinese CCL producers with strong technical credentials operate at panel MOQs that make small-volume qualification impractical. A supplier with excellent Td ≥ 350°C data and ISO 9001-certified production may require a 500-panel minimum that does not fit a qualification trial. Budget for that friction at the outset.

Substrate Grade Comparison — Four Parameters Across Five Material Classes #

The table below draws from COA data and published laminator specs across 31 qualification evaluations. Values represent ranges from production lots, not datasheet maximums.

Substrate Grade Tg (°C, DSC) Td (°C, TGA 5%) Z-axis CTE α2 (ppm/°C, above Tg) Dk at 1 GHz (±tolerance)
Standard FR4 (e.g., Shengyi S1141) 130–140 300–315 250–310 4.5–4.8 (±0.15)
Mid-Tg FR4 (e.g., Shengyi S1000-2) 170–175 335–345 220–260 4.4–4.6 (±0.12)
Halogen-Free FR4 (e.g., Iteq IT-180A) 175–180 350–360 200–240 4.3–4.5 (±0.10)
High-Speed Low-Loss (e.g., Panasonic M4) 185–200 355–370 180–210 3.7–3.9 (±0.05)
PTFE-Based (e.g., Taconic TLY series) >260 (no Tg) >450 30–60 2.2–2.5 (±0.04)

Production lot ranges from 31 qualification evaluations, 2023–2024. Dk tolerance reflects inter-lot variation observed at incoming inspection, not datasheet spec limits.

The pattern visible in this data is not subtle: α2 improvement from standard FR4 to halogen-free FR4 is meaningful (roughly 20–25% reduction), achievable at moderate cost premium, and directly predictive of barrel integrity in lead-free reflow at ≥260°C peak temperature. The jump to high-speed laminate adds relatively little α2 benefit but delivers substantial Dk/Df improvement — which is only relevant if signal integrity at GHz frequencies is a design requirement.

PTFE-based substrates are a separate category entirely. The z-axis CTE advantage is dramatic, but the handling requirements, drilling parameters, and chemical processing compatibility constraints mean they belong in a different sourcing conversation. Treating PTFE as a “premium FR4 substitute” is a specification error we have had to correct more than once during design reviews.

One limitation we are still tracking: our dataset for high-speed laminates above 10 GHz Dk behavior covers fewer than eight lots from Chinese domestic producers. The high-frequency laminate segment in China is still dominated by imported materials or licensed production. That may shift over the next 24 months as domestic investment in this sub-category accelerates.

Practical Guidance for Buyers #

When sourcing PCB substrates from China, start your technical review with z-axis CTE (α2) and Td — not Tg, which is the parameter most Chinese CCL datasheets lead with and which is easiest to optimize in isolation. A substrate with Tg of 170°C and Td of 305°C will not survive aggressive lead-free assembly profiles; a substrate with Tg of 150°C and Td of 345°C very likely will.

The specific risk scenario to plan for: a supplier who passes your initial qualification sample submission may be drawing from a pre-production lot with careful raw material selection. Production volume material, sourced from the same supplier’s ongoing compounder relationship, may show Td values 15–25°C lower — below your application threshold — without any change in the catalog grade designation. This is not fraud; it is the tolerance band that GB/T 4722 allows for laminate classification, which is wider than IPC-4101 class requirements. Incoming spot-testing by TGA on 1 panel per lot is the only reliable catch.

Before volume commitment, insist on a 10-panel qualification run with full TMA and TGA testing per IPC-TM-650 methods — tested by an accredited third-party lab, not by the supplier’s in-house QC. Supplier self-reported Td data has shown a consistent optimistic bias of 8–15°C in our incoming verification dataset. That delta is small enough to be invisible on a datasheet review and large enough to matter in production.

For conductive and functional materials used in PCB surface finishing, cross-check copper foil peel strength requirements against your substrate specification before finalizing the laminate grade. And for related sealing and thermal interface materials used in PCB assembly environments, the sealing-thermal category covers compatible consumables.

What is the most important thermal parameter to specify for PCB substrates used in lead-free assembly?

Td (decomposition temperature) measured by TGA at 5% mass loss. For lead-free assembly with peak reflow at 260°C, require Td ≥ 340°C — a substrate with Tg of 170°C but Td of 310°C will show measurable degradation under multiple reflow passes.

How do Chinese CCL producers’ GB/T standards compare to IPC-4101 for substrate classification?

GB/T 4722 allows wider tolerance bands for several key parameters than IPC-4101 requires, particularly for Tg classification windows and dimensional tolerances. A product described as “IPC-4101 compliant” by a Chinese supplier should be verified against the specific slash sheet — the claim is sometimes based on GB/T test data that would not satisfy the IPC requirement.

Should we request Dk/Df data for standard FR4 used in industrial control boards?

For designs below 1 GHz, Dk/Df variation within standard FR4 grades has no measurable impact on signal integrity. Requesting it is not wrong, but prioritizing it over α2 and Td data for industrial applications is a specification error in terms of what actually predicts reliability.

How many lots should we test before approving a new CCL substrate supplier?

Three consecutive production lots, tested across the full parameter set including α1/α2, Td, peel strength, and moisture absorption. Single-lot approval is sufficient for cost benchmarking, not for qualification.

Does panel thickness affect the z-axis CTE behavior significantly?

It affects the absolute barrel strain (thicker panels accumulate more z-axis expansion through a thermal cycle) but not the CTE value itself. The practical implication: the α2 threshold that matters for a 1.6 mm 8-layer board is different from what matters for a 3.2 mm 16-layer board. Specify your stackup parameters explicitly when requesting COA data so the supplier cannot provide a thinner-panel test result as a proxy.

Published by sinoraw.com Technical Team | Request a sourcing consultation


Source: https://sinoraw.com/docs/pcb-electronic-substrates-technical-specification-overview/
© 2026 sinoraw.com. All rights reserved. Unauthorized reproduction or distribution is prohibited.
Updated on 8 June 2026

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Table of Contents
  • Z-Axis CTE, Td, and the Specification Parameters That Actually Predict Failure
  • Supplier Qualification — What to Request and What the Response Tells You
  • Cost-Performance Trade-offs Across Substrate Grades
  • Substrate Grade Comparison — Four Parameters Across Five Material Classes
  • Practical Guidance for Buyers
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