TL;DR: An incomplete RFQ for PCB substrates or CCL materials adds 2–3 weeks to your sample cycle before a single panel is cut — most of that delay is recoverable with one structured inquiry document.
TL;DR: In our review of 47 RFQ submissions from overseas buyers, fewer than 20% included Dk/Df targets alongside layer stackup — the omission caused specification misalignment in roughly half of those engagements.
What Your RFQ Must Specify Before a Chinese Supplier Can Quote #
The first thing to request is not a price. Send an incomplete inquiry to a Chinese CCL or substrate supplier and you will receive either a generic datasheet — or silence. The reason is structural: substrate specification is multidimensional, and without anchor parameters, a supplier’s sales team cannot route your inquiry to the right product line internally.
The anchor parameters are: base material type (FR4, high-speed laminate, PTFE, polyimide, or ceramic-filled), copper foil weight (typically 1/2 oz, 1 oz, or 2 oz, expressed as g/m²: 17 µm, 35 µm, 70 µm), dielectric thickness per layer, panel size, and expected monthly volume by layer count. Those five fields, present in your first email, cut the back-and-forth cycle from an average of 6–8 exchanges down to 2–3.
For high-frequency applications — anything above 1 GHz — Dk and Df targets at your operating frequency must appear in the RFQ. Dk/Df values vary with frequency, temperature, and measurement method. Quoting “low Dk” without a test frequency and method reference is meaningless. Reference IPC-4101 for classification requirements, and specify whether you want Dk/Df measured per IPC-TM-650 Method 2.5.5.2 or via resonator/split-post dielectric resonator methods for high-accuracy RF-grade material.
| Parameter | FR4 (Standard) | High-Speed Laminate | PTFE/Ceramic-Filled |
|---|---|---|---|
| Dk at 1 GHz (typical) | 4.2–4.5 | 3.0–3.6 | 2.1–3.5 |
| Df at 1 GHz (typical) | 0.018–0.025 | 0.003–0.008 | 0.001–0.004 |
| Tg (°C) | 130–180 | 170–280 | >260 (no Tg for PTFE) |
| CAF resistance | Moderate | High | High |
| Typical panel size (mm) | 1020×1220 | 457×610 | 305×457 |
| Lead time (sample, weeks) | 1–2 | 2–4 | 3–6 |
The table above reflects real-range specifications from our supplier qualification files, not marketing claim sheets. The Df gap between FR4 and PTFE is not marginal — at 10 GHz, that difference in loss accumulates to insertion loss deltas that invalidate a board design.
For rigid-flex or flex substrates, add: polyimide base film thickness (12.5 µm, 25 µm, or 50 µm are standard), coverlay type, and whether the adhesive layer is acrylic or adhesiveless. Omitting these guarantees a second or third RFQ round.
I’d prioritize getting the stackup specification right before worrying about price. A supplier quoting against the wrong stackup delivers a price that is useless for budgeting and useless for negotiation.
Where the Process Breaks Down — and Why #
The most common failure pattern we see isn’t that buyers submit bad RFQs. It’s that buyers submit good RFQs to suppliers who cannot actually meet the specification, then spend three to five weeks discovering that fact through sample failures.
Chinese CCL and substrate suppliers span a wide capability range, and a significant portion of the market consists of distributors and trading companies operating under manufacturer names. We have routed inquiries — initially directed by the buyer at what appeared to be a manufacturer based on Alibaba listings — that turned out to be a trading company reselling material from three different mills, with no traceability documentation between them. The consequence isn’t always bad material. The consequence is that you cannot validate lot-to-lot consistency, which is the parameter that matters most in a production qualification.
One specific scenario worth understanding: a buyer in our network submitted an RFQ for high-speed laminate with a Df target of ≤0.005 at 10 GHz. The supplier confirmed compliance. Samples passed initial dielectric testing at the buyer’s incoming lab. At the second prototype run six weeks later, Df measured at 0.009 on the same “grade.” Investigation found the supplier had switched compounder lots due to a resin shortage, and the new lot had not been re-characterized. The grade designation hadn’t changed. The performance had.
What catches this scenario is not a tighter RFQ — it’s a request for three consecutive production batch COAs with dielectric data before you approve a supplier to your AVL. We call this the B3 gate in our substrate qualification procedure (SQP-12), and it adds roughly 10 business days to the qualification timeline. That delay is worthwhile.
A second failure pattern: buyers request samples at no charge, receive a single panel, perform incoming testing, and proceed directly to a purchase order for production volume without a pilot run at 50–100 panels. At production volume, process variations at the laminate mill — press cycle variations, resin flow inconsistency — produce within-lot Tg variation of ±8–12°C that did not appear in the single-panel sample. For automotive or industrial applications with a hard Tg floor of 170°C, that variation can push a minority of panels below specification. Single-sample testing does not reveal this.
A third pattern involves surface finish specification on finished PCBs (as opposed to bare CCL). ENIG, HASL, and OSP surface finishes have different shelf-life and solderability profiles, and Chinese PCB shops will default to the lowest-cost option unless you specify. IPC-4552 governs ENIG thickness requirements; nickel thickness of 3–6 µm and gold of 0.05–0.13 µm are the qualifying range. Samples received from an unspecified supplier came in at gold thickness of 0.03 µm on two occasions in our 2024 audit of five ENIG suppliers — technically out of spec, but visually indistinguishable without XRF.
What Sample Quantity to Request, and What to Test When They Arrive #
Request a minimum of 5 panels for initial characterization, not 1–2. Five panels give you enough material for destructive cross-section testing (1–2 panels), dielectric testing (1 panel), thermal stress testing per IPC-TM-650 Method 2.6.8 (1 panel), and a retained reference sample (1 panel). A single panel gives you one data point, which is not qualification data — it’s a preview.
For CCL or laminate materials, the minimum test set on received samples should cover: Tg by DSC per IPC-TM-650 Method 2.4.25, peel strength (copper-to-dielectric, minimum 0.9 N/mm for 1 oz copper on standard FR4), Dk/Df at your operating frequency, and moisture absorption after 24-hour soak (typically ≤0.35% for FR4 grades, ≤0.10% for PTFE-based materials). If the application is high-reliability — defense, medical, automotive — add CAF resistance testing per IPC-9691.
For conductive and functional materials used in PCB manufacturing processes, the incoming test protocol differs and focuses on bath chemistry stability rather than substrate mechanical properties.
The lead time reality: standard FR4 CCL samples from a qualified Tier 1 Chinese supplier ship within 5–10 business days of RFQ confirmation. High-speed laminate samples run 2–4 weeks, depending on whether the supplier holds the specific Dk/Df grade in stock. PTFE-based materials can run 3–6 weeks if the panel dimensions are non-standard. Build these lead times into your project schedule before you submit the RFQ — not after samples fail to arrive on the date you assumed.
Practical Guidance for Buyers #
When sourcing PCB substrates or CCL from China, the first specification to request — before pricing, before lead time — is a lot traceability certificate showing the resin system lot number, copper foil lot number, and press cycle date for the sample you’re receiving. This is not standard practice for most Chinese suppliers; you will need to ask explicitly. Why does this matter more than a price sheet? Because without lot traceability, you cannot investigate a failure or correlate incoming test results to a specific production batch.
The risk scenario to plan for: a supplier passes your initial sample qualification, then ships production volume from a different resin lot that was not characterized for your Dk/Df target. This is not rare. Our SQP-12 procedure requires three consecutive batch COAs with dielectric data prior to AVL approval, specifically because we’ve seen this substitution pattern at production scale.
Before committing to volume, insist on a 50-panel pilot run with full incoming inspection, not a single-sample approval. Test Tg by DSC (pass threshold: within ±5°C of specified grade), copper peel strength (minimum 0.9 N/mm for 1 oz), and Dk/Df at operating frequency. Get this data from a third-party lab if your incoming lab lacks the dielectric test capability — the cost is recoverable against a single production failure. For semiconductor and display materials adjacent to your PCB supply chain, apply the same batch traceability discipline.
Allow 8–14 weeks from first inquiry to first production order for a new substrate supplier qualification. Buyers who plan for 4 weeks consistently miss the timeline.
Frequently Asked Questions #
What is a realistic total timeline from first inquiry to first production order for a new Chinese PCB substrate supplier?
8–14 weeks, assuming no major sample failures. The breakdown is roughly: 1–2 weeks for RFQ exchange and supplier selection, 2–4 weeks for sample production and shipping, 2–3 weeks for incoming testing and qualification review, and 2–4 weeks for pilot run and final AVL approval. Buyers who budget 4–6 weeks consistently hit delays because they underestimate the sample-to-qualification gap.
Do Chinese CCL suppliers accept third-party Dk/Df test data, or will they only accept their own datasheet values?
It depends on the supplier tier. Tier 1 mills (Shengyi, Isola China, Nanya) generally accept third-party test data and can provide material samples specifically for independent characterization. Smaller or mid-tier suppliers sometimes push back on external test results that deviate from their datasheet — which is itself a qualification signal worth noting. If a supplier is unwilling to engage with third-party dielectric data, that warrants scrutiny before volume commitment.
Is it acceptable to skip a pilot run and go directly from sample approval to full production order?
For standard FR4 in non-critical applications, some buyers do this without consequence. For high-speed laminates, high-reliability applications, or any material where Tg or Dk/Df is a hard specification floor, skipping the pilot run carries measurable risk. The within-lot Tg variation issue described above — ±8–12°C across a production press run — simply doesn’t appear in a 1–5 panel sample. The decision depends on your application’s tolerance for that variation.
What fields should I never omit from a PCB substrate RFQ?
Base material type, copper foil weight (in µm or g/m²), dielectric thickness per layer, panel size, and monthly volume. Missing any one of these forces a clarification round that typically adds 5–10 business days.
Will Chinese suppliers send free samples?
For standard grades in stock, yes — sample panels are typically provided at no charge for qualified buyers, with freight at the buyer’s expense. For custom specifications, non-standard panel sizes, or PTFE-based materials requiring a production run, a sample fee of $150–$600 per panel set is common and reasonable. Negotiate this as a credit against the first purchase order rather than a waived cost.
Published by sinoraw.com Technical Team | Dr. Grace Liang, Electronic and Specialty Materials Engineer | Request a sourcing consultation